@User @User I tried to reproduce the DRC issue w/ OpenRAM v1.1.19, and the flow worked for me w/

open_pdks.sky130a-1.0.286_0_g52af776

and

magic-8.3.257_0_gc8c8f8b

(see this notebook https://colab.research.google.com/gist/proppy/207020434aa0ff38bfd89eb97a4d4f59/openram-playground.ipynb) is there something special to do to enable the DRC check? (it printed

DRC/LVS/PEX is only run on the top-level design to save run-time (inline_lvsdrc=True to do inline checking).

so I'm not sure how extensive the current testing is?)

That message is fine, it just means the entire SRAM is DRC/LVSed. If you enable that, for debugging, it will check each module as it is created to isolate errors earlier.

also let me know if you'd like the notebook in the repo, I think it could make a good (interactive!) complement to the current docs at https://openram.org/