does openlane support VHDL?
t
does openlane support VHDL?
j
I think yosys, the synth, only supports verilog but it seems some people are working on vhdl, for example you could look at this project: https://github.com/ghdl/ghdl-yosys-plugin
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seems experimental, might not be suitable for the openlane flow ๐Ÿ˜ž
a
Not currently, but we've been planning to try the above plugin for a while.
u
I hacked it to place leon3mp design, itโ€™s usable
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