Hi Guys, I am working on Neuromorphic Computing chips, more specifically the ReRAM arrays. We use them for in memory computing as well as for building blocks for neural network hardware. So I have the bare ReRAM arrays fabricated from our on campus foundry. So these arrays doesn't have column sense amplifier/ DACs or other circuitry. We use probe station to send pulses ( around 3ns and 2V or .2V ) . I was thinking about making a ASIC for these chips that I have. The ASIC should be able to generate nano second plulse and convert microamp current to digital bits. Can't say I figured out everything. But looking for collaboration on the ASIC design. It will be fun to make something like IBM's True North one day 😅

what kind of collaboration are you looking for?

@Josh Marks starting from the simplest step. Readout circuits. I don't have scripting experience now, so looking for collab over there. I do spice/other circuit simulation. But top down design will be better. Also we can brainstorm the overall idea to make it better. ( Wanted to send a readout circuit block diagram image but I guess you can't do that when you're replying )

I worked on “read in” circuits for micro-led displays

@Josh Marks (wait, I can)

I can help

@Josh Marks you mean time frame to finish? We don't have deadline for this yet. But getting full complete design by early October will be great. I might be able to fabricate full or part of it in next tape out ( possibly November )

@Minhaz Abedin yea I just wanted to make sure I would have time to help when you needed it. Do you need help designing the column and row decoders?

@Josh Marks Thanks again for offering to help. Yes that would be a good starting point 🙂