Is anyone here interested in collaborating on an open source ML accelerator tape-out? I'm at Tensil.ai (www.tensil.ai) and we're considering doing an ASIC run. We already have working designs - currently our accelerators are implemented on FPGA. We're looking specifically for someone who has prior experience with tape-outs. Send me a DM if interested!
This would be a Skywater tape-out if that wasn't clear