@Tim 'mithro' Ansell I have briefly read the paper and I am also confused by the theory paragraph. My current feeling is that the TLFPGA is a domain specific FPGA architecture, optimized to boost deep pipelined implementations. The TL logic elements may be rarely used in general-purpose implementations. There have be plenty of works around. @Pierre-Emmanuel Gaillardon and I have done similar works before. What we found is that the architecture will bring overhead when the implementation contains specific logic (cause the TL logic for example to be wasted). If you want more insights from the theory paragraph, I know some logic synthesis experts and I can ask for help.