Dale Julson
04/18/2025, 6:22 PMresetb line (seen here). I am including a screenshot video of the test. DIO10 in the video is resetb, DIO11 is fcsb, and DIO12 is fclk. DIO0 is high in the video because it is connected to CSB (the DIO pin labels are slightly offset from their labeling on the Caravel chip, however this shouldnt affect the functionality, we would just expect to see DIO[0:5] go high instead). We see in the video what I believe is the expected bootup procedure of the CPU, however it does not appear to fetch the instructions and does not set the expected outputs to high. Is there anything wrong with this overall workflow, or perhaps anything I am missing? I have tried clock speeds from 1MHz down to 1kHz but it hasnt changed anything. Thanks!!Dale Julson
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