I don't understand how to compile and flash the test routines for each IP. Admittedly, I'm a novice with makefiles. I was hoping we don't need to run

get_ip_blocks

and

run-precheck

first, given that you've already taped out. It looks like we need some source files in https://github.com/efabless/caravel/tree/27cbe49c90ba5362ad52c9968dd98e035c30c74f/verilog/dv/caravel, though, and the RISC-V toolchain from https://github.com/YosysHQ/picorv32.

I did the development of the code in

caravel_board

and then copied everything to

firmware

in the design repository. The various firmware routines that it needs exist in the

caravel_mgmt_soc_litex

repository, which is not a great setup in my opinion. It can probably be compiled from the design directory if you clone caravel and then correct the paths in the Makefile. However, I recommend that you just take the code and copy it into a clone of

caravel_board

under

firmware/chipignite/

. Then all of the directory references should be correct, and it should compile (also, then you have immediate access to the flashing script). You do need the RISC-V toolchain. The VexRISC is

rv32i

and not

rv32imc

, so make sure the toolchain supports that (I think so?).

Thank you! Copying things into caravel_board/firmware/chipignite worked for me. In detail, for anyone wanting to replicate in an Ubuntu/Debian environment:

## Change system settings to allow FT232HQ<->Python comms with authorized users:
$ sudo apt install libusb-1.0-0
$ echo 'SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="6014", GROUP="plugdev", MODE="0664"' | sudo tee -a /etc/udev/rules.d/22-chipalooza.rules
$ sudo adduser $USER plugdev
$ sudo udevadm control --reload-rules
$ sudo udevadm trigger
$ newgrp plugdev

## Clone the test files and move them to the chipignite directory:
$ git clone <https://github.com/RTimothyEdwards/chipalooza_projects_1>
$ git clone <https://github.com/efabless/caravel_board>
$ cd caravel_board/firmware/chipignite
$ cp ../../../chipalooza_projects_1/firmware/* .
$ cp -r ../../../chipalooza_projects_1/firmware/{YOUR_TARGET_PROJECT} .

## Set up your python environment (assumes python3 is installed and on PATH):
$ python3 -m venv ./venv
$ source venv/bin/activate
(venv) $ pip3 install pyftdi

## Run the test / flash the board:
# Plug in the development board with required power jumpers installed
# Must have the RISC-V toolchain installed, either riscv32i or riscv32imc
(venv) $ cd {YOUR_TARGET_PROJECT} 
# Inspect the Makefile and make any directory adjustments for your RISC-V toolchain
(venv) $ make clean flash
# After flashing the Winbond chip, two Python scripts run which I believe can be customized further along with the test C program

## When you're done using the Python venv:
(venv) $ deactivate