I get GLIBC version issue.
Can someone please help me solve this issue? I am trying to re-run already well documented repository. I am verifying the design before using it furthher.
Original Repo -
https://github.com/manili/vsdbabysoc_mpw3
In the verilog/rtl directory, I am following the instructions.
First of all, I don't know why, but even though I have already exported the environment variables for openlane and pdk. It still gives me error for it. I check it with echo command and I can see the path set by me.
Whenever I run simulation, it shows me this issue with GLIBC_2.33 and GLIBC_2.32 version.
Logs:
""
satvik@satvik-GF63-Thin-11UC:~/vsdbabycore/vsdbabysoc_mpw3$ make verify-all-rtl
docker pull efabless/dv:latest
latest: Pulling from efabless/dv
Digest: sha256:06497b070c8578fbbe87170c9f4dfa61c2c9a9d9f665a637c4d822ea98a7f1b7
Status: Image is up to date for efabless/dv:latest
docker.io/efabless/dv:latest
docker run -v /home/satvik/vsdbabycore/vsdbabysoc_mpw3:/home/satvik/vsdbabycore/vsdbabysoc_mpw3 -v /home/satvik/Caravel-Basic/dependencies/pdks:/home/satvik/Caravel-Basic/dependencies/pdks -v /home/satvik/vsdbabycore/vsdbabysoc_mpw3/caravel:/home/satvik/vsdbabycore/vsdbabysoc_mpw3/caravel -v /home/satvik/vsdbabycore/vsdbabysoc_mpw3/mgmt_core_wrapper:/home/satvik/vsdbabycore/vsdbabysoc_mpw3/mgmt_core_wrapper -e TARGET_PATH=/home/satvik/vsdbabycore/vsdbabysoc_mpw3 -e PDK_ROOT=/home/satvik/Caravel-Basic/dependencies/pdks -e CARAVEL_ROOT=/home/satvik/vsdbabycore/vsdbabysoc_mpw3/caravel -e TOOLS=/foss/tools/riscv-gnu-toolchain-rv32i/217e7f3debe424d61374d31e33a091a630535937 -e DESIGNS=/home/satvik/vsdbabycore/vsdbabysoc_mpw3 -e USER_PROJECT_VERILOG=/home/satvik/vsdbabycore/vsdbabysoc_mpw3/verilog -e PDK=sky130A -e CORE_VERILOG_PATH=/home/satvik/vsdbabycore/vsdbabysoc_mpw3/mgmt_core_wrapper/verilog -e CARAVEL_VERILOG_PATH=/home/satvik/vsdbabycore/vsdbabysoc_mpw3/caravel/verilog -e MCW_ROOT=/home/satvik/vsdbabycore/vsdbabysoc_mpw3/mgmt_core_wrapper -u $(id -u $USER):$(id -g $USER) efabless/dv:latest sh -c "source ~/.bashrc && cd /home/satvik/vsdbabycore/vsdbabysoc_mpw3/verilog/dv/io_ports && export SIM=RTL && make"
/home/satvik/vsdbabycore/vsdbabysoc_mpw3/riscv-gnu-toolchain-rv32i/riscv-gcc/bin/riscv32-unknown-elf-gcc -I /home/satvik/vsdbabycore/vsdbabysoc_mpw3/caravel -march=rv32imc -mabi=ilp32 -Wl,-Bstatic,-T,/home/satvik/vsdbabycore/vsdbabysoc_mpw3/caravel/verilog/dv/caravel/sections.lds,--strip-debug -ffreestanding -nostdlib -o io_ports.elf /home/satvik/vsdbabycore/vsdbabysoc_mpw3/caravel/verilog/dv/caravel/start.s io_ports.c
/home/satvik/vsdbabycore/vsdbabysoc_mpw3/riscv-gnu-toolchain-rv32i/riscv-gcc/bin/riscv32-unknown-elf-gcc: /lib64/libc.so.6: version `GLIBC_2.33' not found (required by /home/satvik/vsdbabycore/vsdbabysoc_mpw3/riscv-gnu-toolchain-rv32i/riscv-gcc/bin/riscv32-unknown-elf-gcc)
/home/satvik/vsdbabycore/vsdbabysoc_mpw3/riscv-gnu-toolchain-rv32i/riscv-gcc/bin/riscv32-unknown-elf-gcc: /lib64/libc.so.6: version `GLIBC_2.34' not found (required by /home/satvik/vsdbabycore/vsdbabysoc_mpw3/riscv-gnu-toolchain-rv32i/riscv-gcc/bin/riscv32-unknown-elf-gcc)
make:
* [io_ports.elf] Error 1
make:
* [Makefile
150 verify-io_ports-rtl] Error 2
satvik@satvik-GF63-Thin-11UC:~/vsdbabycore/vsdbabysoc_mpw3$
""