#325 Query about RF Layout in KLayout
Issue created by
Ikram-rs22
I have some queries about RF layout in this pdk rule -
1. Like cadence, is the black portion of the screen considered as global p substrate?
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1. About guard rings, is the HBT inside a guard ring? How do we create a guard ring for the resistors as the bulk connection is sub! ? The layers needed for creating a guard ring. Is the layers in the ptap pycell the ones for creating a guard cell?
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1. Regarding the metal shielding in RF designs, is it a problem to have a global metal shielding for the routing paths and pycells or does it need to be chopped ? Is there any layer which will prevent the respective area where it is drawn from being covered in the global metal shielding meaning that part won't be counted in the shielding??
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IHP-GmbH/IHP-Open-PDK