@Stefan Schippers is it possible in xschem to parameterize component vectors and busses to change the number of elements? I've been playing with a chain of resistors to give me a more accurate model that includes the contact effects when building a large resistor out of smaller parts (see attached). It would be great if this could be made into a more parameterized symbol that can be re-used for arbitrary chain lengths.

@Roel Jordans What you ask in general is done by using schematic generators aka P-cells. Normaly parametric-cells are used for layout, but xschem allows to use this mechanism too. The simple thing is: if instead of

res_high_po_chain.sch

for the schematic reference the following is used:

res_high_po_chain.tcl( @n )

where

res_high_po_chain.tcl

is a script that outputs a valid schematic file on standard output xschem recognizes this syntax as a call to a generator script. The reference is transformed to

res_high_po_chain.tcl 15

where 15 is the substituted value for

@n

the command

res_high_po_chain.tcl 15

is executed and the output from the command is captured by xschem and used as the actual schematic. Try the files below, remember to set the tcl script access mode to executable.

Awesome! That's exactly what I was looking for indeed. Thanks for the added explanation video too, it was really helpful

@Roel Jordans use this syntax in the schematic attribute:

schematic="res_high_po_chain.tcl(@n , @model )"

Since

@n

and

@model

parameters are used a space separator must be used:

@n, @model

will substitute the value of

n,

, while

@n ,

will substitute the value of

@n

. Xschem allows almost all characters in the definition of

@

variables, since guys doing PCB design use almost all characters for their designs and also schematics imported from other tools (expecially synthesis tools) use almost all sort of strange characters. So comma, brackets and more are all allowed.

var(2,3)=10

is valid and

@var(2,3)

will replace with 10 in a symbol / subcircuit.

ok, thanks! I thought I tried most syntax variations but apparently missed one 😅

@Roel Jordans when working with different tools there are various pitfalls everywhere. Tcl has its own rules for special characters like

$

for

$var

substitution,

[cmd]

for

cmd

execution. Xschem itself uses

@

for variable substitution. I used

@

to avoid collisions with the commonly used

$

character used by shell languages. Ngspice frequently uses

@

and

[ ]

to look up model parameters, so if a spice node like

i(@m.x1.xm1.msky130_fd_pr__nfet_01v8_lvt[id])

needs to be processed by Tcl and xschem some special care must be used to avoid xschem to replace the

@m.x1.xm1.msky130_fd_pr__nfet_01v8_lvt[id]

variable and /or tcl to execute the

[id]

command. I have seen designs where instance and circuit net names contain spaces and backslashes. Some tools require escape characters

\

when identifiers contain forbidden characters. Moreover, Spice and VHDL netlists are case insensitive while Verilog is case sensitive. So it is a complex world, and when fixing one thing it is very easy to break another one.

yeah, getting the tools to behave individually can be a challenge, getting them to work together is a whole other level

Thank you @Roel Jordans. Yes, there are some issues. Xschem builds a unique name for the generated subcircuit taking the generator name and the parameters (so you can instantiate multiple objects with differen parameters and avoid naming collisions). I need to fix 2 things. • when using parameters for building the subcircuit name I must transliterate forbidden characters to valid ones for spice (for example replacing a . with a _ or similar) • xschem gets confused by the dot (probably somewhere in the code it using the dot to find the file extension and finds 0.35 instead of .tcl). Will be back soon with a fix.

Excelent! It works perfectly now here. And thanks for the added effort of the explanation video!

Thank you for testing and reporting!