Hey! Could someone tell me what the component attached to the Vss ipin.sym is? Is this done so that when doing layout all the points supposed to be shorted to this port dont generate multiple ports of the same name or something?

@Tejas Nafde that component is a net label (

lab_pin.sym

, also available a slightly different one,

lab_wire.sym

). In this case it is absolutely redundant since the

ipin.sym

is itself (also) a net label (it gives a name to a net). The needed label is the one correctly placed at the source of M12. The purpose of net labels it to give a name to a net and allow "connect by name" instead of physically wiring together components / ports.

I'm assuming the way the ipin and the label are used are: the ipin as a port for the Symbol you would create from this schem, and the label to short all the different NMOS sources/ground to the Vss port? or that redundant and the same Ipin can be copy pasted as long as it has the same name?

@Tejas Nafde yes, the ipin.sym indicates a port of the symbol, no multiple ipin.sym with same name should be present. a lab_pin.sym (or lab_wire.sym) can be attached to an existing wire and names that wire (otherwise xschem assigns a generic net# name when doing a netlist). You can have multiple lab_pin.sym with the same name in a schematic. They will refer to the same electrical net, so multiple labels with same name are electrically shorted together. The vdd.sym and gnd.sym are tier symbols, they by default operate like lab_pin.sym symbols and also create a .global line in the netlist, making the node global. lab_wire.sym and lab_pin.sym do not create global nodes, unless a global=1 attribute is set. in the opposite way, if you want to add a supply vdd.sym or ground gnd.sym symbol but want to keep the node local add a global=0 attribute to it.

@Stefan Schippers so why is the notation used in the picture redundant? Is it because the name of the ipin is Vss and not Gnd?

@Tejas Nafde I try with a picture... The only case where a label is attached to an input pin (case 4) is if the circuit is empty, nothing is attached to the ipin and you want to avoid warning messages from xschem. An unconnected pin is usually an error so a warning is generated.

I'm sorry if I keep misunderstanding. My interpretation of this is basically the redundancy is caused by giving a name (label) to the net as well, as the ipin is already naming the net based on its own name?

@Tejas Nafde correct. an input port (ipin.sym) creates the specified named net in current schematic and also creates a port to get the net from the upper hierarchy. You can attach a label to it as in case 4) as long as ipin.sym and lab_pin.sym specify the same net name. Otherwise you are shorting two different nets.

Got it, thank you for your time and patience :))