A simple example (the grey counter, one of the pdk-agnostic xschem examples) simulated with 5 different simulators with no changes.

ngspice

-

Xyce

-

Icarus verilog

-

Verilator

-

GHDL

.

Thanks @Stefan Schippers. Previously when I wanted to co-sim verilog with spice in xschem I used verilator on my compiled verilog and co-simulated the verilator output with spice. Is this step still necessary? Specifically speaking - can I co-sim verilog with spice without using verilator? Also, I noticed your xyce sim was much faster than your ngspice one. Is this a correct observation as I have heard that xyce is much faster in general (dont know what sort of fastSPICE algorithms it uses under the hood).

@Diarmuid Collins The cosim shown above is with verilog-A, which is more specifically aimed at describing analog blocks. Also some new transistor models are now described in Verilog-A. True analog (with spice) and digital (with verilator or -maybe- Icarus verilog) mixed mode is a different thing and I want to try that as well. Regarding the speed I have not seen big differences in (serial) Xyce vs ngspice. Ngspice wins in some testcases, Xyce wins in other. For small test cases the total time is not the actual simulation speed but includes a considerable fraction where the simulator sets up the data structures and parses the input netlist and device models.

The main difference between ngspice and xyce that we have seen is in memory efficiency, ngspice simply runs out of memory much faster than xyce does on larger simulations

@Stefan Schippers: I have run some verilog / ngspice co-sims using verilator (4 bit counter into transistor level logic gates). Worked well so attached is how I did it and my tbs.

@Roel Jordans: ngspice allows to restrict the amount of data to be saved by using the 'save' command: save only what you need, the nodes you need, discard the rest.

@Holger Vogt that helps indeed and ngspice works fine for many of our simulations, with Xyce though I don't need to be selective in what to save

How come? ngspice does save one double precision value per node and accepted time step. What does Xyce save automatically? Do they already restrict the amount of nodes? You may set 'option interp' to save data interpolated only for each TSTEP. In addition, if you run multiple simulations in sequence, ngspice keeps all the old data in memory. You will actively need to remove them (command 'destroy ...').

I'm not sure what the difference is indeed. I agree that intuitively both tools should be looking at the same amount of data. We started our project before ngspice had KLU support, that should have made a difference at that time, but I'm not sure what is currently causing any differences (or even how much of them remain indeed). It could be that some of the options (

.option LINSOL TYPE=AztecOO PREC_TYPE=Ifpack

) we're using with Xyce make the difference but then I should dive deeper into ngspice again to see if it allows for similar options too.

@Roel Jordans One difference might be when using ngspice in control/interactive mode. In this case the data is created in memory and saved at the end with a

write

command. Using batch mode ngspice (

ngspice -b -r circuit.raw circuit.cir

, which is more an apple to apple comparison with Xyce which is only batch mode) data is saved on disk and the whole simulation database is not growing in memory. The advantage of interactive/control mode is flexibility, since you can post-process all simulated vectors and make calculations. The disadvantage as you noticed is the growing memory footprint, that can be mitigated by reducing the saved nodes (no

.option savecurrents

and no

save all

)

ah, that would explain a lot indeed! most of my scripts use the interactive mode. I'll see if I can get things to run better with ngspice again then, thanks for the tip!

@Roel Jordans the issue is that in batch node no

.control

/ ... /

.endc

blocks must be present (or are just ignored, I don't remember) so the testbench in some cases needs to be edited. Just add the analysis line (.tran .... .ac ... whatever) and the

.save

lines (if you want to save only selected nodes, if no .

save

is present all voltage nodes and voltage source currents are saved by default).