A netlist (expecially a spice netlist) contains much less information than a schematic. It loses any geometrical information of component placements and (for spice netlists) it loses all pin directions, so looking at a spice netlist you can't tell if a subcircuit I/O is input or output or inout.
For this reason it is quite difficult to get a human readable imported schematic. I often do a diferent thing. I create a symbol for the top spice netlist, and then i import the netlist of the block as text, so i can use this circuit in a parent schematic. of course this is not good for any use cases.