Hi, In the design hardening step: I have an output which is 32-bit, but the io-ports have only 38 ports in which the bottom 8 is left out which gives me 30 ports to use. So i am not able to map my output to io.when i do i am getting index out of range error. How should i relove this issue?

"I have an output which is 32-bit, but the io-ports have only 38 ports in which the bottom 8" 32 + 8 = 40, where another two pins came from? "So i am not able to map my output to io.when i do i am getting index out of range error" I do not see such error in the log. "How should i relove this issue?" YOu mean the warning about 32 bit being extended to 38 bits? Just extend the verilog literal that is being assigned as you need.