I am Pramit and I recently participated in "Capture the Bug" design Verification hackathon using cocotb and opensource tools. This Hackathon is organized by NIELIT Calicut and technically facilitated by *Vyoma Systems , VLSI System Design & IEEE Robotics and Automation Society *and ably mentored by Indian Institute of Technology Madras (IIT Madras)

Pramit, Can you tell me more about this hackathon? How many students participated? Was participation restricted only to one institute?

There were about 200 participants post screening. It was open to all. Python based design verification using all open source tools. cocotb and verilog was used.