Hi
i got property error while doing lvs check
how to resolve it
i attached the comp.out file ,
inv_2.spice(layout)
inv.spice (schematic)
@Tim Edwards@Mitch Bailey
thank you
Yes, that's the general idea. The setup file tells netgen, for example, to ignore all of the obscure parameters that either don't appear in one or the other netlist or are not expected to match (e.g., source and drain areas are estimated in the schematic).
a
Ashutosh Kumar
08/19/2022, 8:38 PM
thank you @Tim Edwards got it .
m
Mitch Bailey
08/19/2022, 11:08 PM
Although your simple circuit may pass LVS, I'd suggest 2 things.
1. When extracting, use the
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