Hi all, We are having the following DRC errors wi...
# ihp-sg13g2
a
Hi all, We are having the following DRC errors with some of the isolated HV_nmos of our design: 1.
nmosi.e1: A separate Iso-PWell contact unabutted to a nmosi device is not allowed
2.
nmosi.e2: nmosi unabutted to an Iso-PWell-Activ tie is not allowed
. Inside the isolbox region we added a tapring and bulks to set the substrate voltage, each one composed of
NBuLay.drawing, Activ.drawing, pSD.drawing, Cont.drawing
. All the taprings and some of the bulks are rejected by rule
nmosi.e1
, In consequence, some of the fets have no tap and fall into
nmosi.e2
. • Do we have to remove the p-tapring? this seems to be the solution according to
e1
• Do we need to include another layer to the bulks? The layout rules document says
Recommendation: Use ptapsb Pcell to ensure proper isolated PWell connection.
That cell is on
libs.ref/sg13g2_pr/
and has a structure that involves
SalBlock.drawing, Activ.mask, nSD.drawing.
Is there a document that explain how it's used? • There's any pcell on the pdk/PR that can generate the required
Iso-PWell contact tap
? @Jorge Marin @Krzysztof Herman @Daniel Arevalos
m
@aquiles viza The rule is explained (somewhat) on page 53 of SG13G2_os_layout_rules.pdf. Are you using klayout rules or Cadence rules? klayout has these rules listed as unimplemented. I imagine what they are trying to ensure is that all the nmos in an isolation region are using the correct source voltage (same as the bulk voltage). I wonder if filling in the yellow regions with ptap would solve the problem.
a
We added the tapring and the bulks to ensure the right voltage across all the isolbox, but that seems to be an invalid strategy. On the layout, tapring and bulks are connected with metal1. The latest
drc_maximal
does not have this rule implemented yet, this was indicated by an ihp employee (as far as I know) and we don't know how to fix this
m
@aquiles viza I don’t think the metal connections are relevant to the rule. Have you tried connecting with diffusion?
k
@aquiles viza @Jorge Marin I have got some answers: 1. the rules
nmosi.e1, nmosi.e2
are obsolete yo can waive it. 2. The cell to generate contact to
ISO-pwell
is
ptap1
👍 1
🔥 1
j
Great news @Krzysztof Herman, thanks We will check ptap1 just to ensure we are following that approach
And many thanks for your help @Mitch Bailey
👍 1
a
The only difference I appreciate between
ptap
and
ptap1
are the inclusion of a
TEXT.drawing
with the
sub!
label, a
Substrate.drawing
box, and the odd metalization that ignores metal overlap rules but does not trigger any drc error. Both uses
Activ
and
pSD
in the same way • Does the inclusion of this differences on our layout implies a difference on the fabrication process? • Is valid to use
ptap1
on nmos devices outside iso-pwell? If it is and makes no difference, I think we should use it always • DRC rules on section 6.5 note 5 seems to recommend using
ptapsb
for iso pwell connection. Is this important? Thanks a lot for the feedback, It's good to hear that those
nmosi
rules are obsolete
k
ptap1
has implicit substrate layer and it is recommended to make contac
it does nor take any effect in the manufacturing process, Implucit substrate layer prevents to locate
ptap1
on
nwell