the models of sg13g2_hbt_mod.lib have t-pin like "...
# ihp-sg13g2o
olisnr
11/26/2024, 12:40 PMthe models of sg13g2_hbt_mod.lib have t-pin like "Qnpn13G2 c b e s1 t npn13G2_NX_vbic dtemp=dtemp m=1". is this temperature? and shouldent it be somehow addressed in the Xscehm-symbolys?
r
rupokdas147
11/26/2024, 1:38 PMAs far as I know the t pin is for temperature. As, the PDK has not fully released yet, thermal conditions is currently not working. Attaching this pin with GND works fine. You will find a four terminal device in the model library also.
o
olisnr
11/26/2024, 2:41 PMthanks.
but the 4th terminal is the S (substrate or shield i think), and while i can let t open for the default temperature (also such a assumption), there is also the parameter m missing in the symbol.
olisnr
11/26/2024, 2:41 PMthe m is also missing in the model
r
rupokdas147
11/26/2024, 3:52 PM@olisnr Can you share your netlist? The component npn13G2 should have 5 terminals: c, b, e, bn, t.
rupokdas147
11/26/2024, 4:11 PMHere I am sharing a simple schematic and Netlist I have simulated in Qucs-s for testing purpose. I hope you will get a idea about the device.
rupokdas147
11/26/2024, 4:12 PM* Qucs 24.3.0 /home/rf/QucsWorkspace/AMP_DESIGN_TEST_prj/AMP_DESIGN_TEST.sch
.INCLUDE "/usr/local/share/qucs-s/xspice_cmlib/include/ngspice_mathfunc.inc"
.SUBCKT IHP_PDK_nonlinear_components_npn13G2 gnd c b e bn t Nx=1
.INCLUDE ../../.qucs/IHP-Open-PDK-main/ihp-sg13g2/libs.tech/ngspice/models/sg13g2_hbt_mod.lib
X1 c b e bn t npn13G2 Nx={Nx}
.ENDS
.LIB /home/rf/IHP-Open-PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerHBT.lib hbt_typ
Xnpn13G1 0 COLLECTOR _net0 0 gnd IHP_PDK_nonlinear_components_npn13G2 Nx=1
VIC _net1 VDC DC 0
VIB BASE _net0 DC 0
R1 _net2 BIAS 100 tc1=0.0 tc2=0.0
R2 _net3 0 100 tc1=0.0 tc2=0.0
R3 _net4 VDC 100 tc1=0.0 tc2=0.0
VCC _net1 0 DC 1
C1 PIN_PreMatcing BASE 1P
L1 BASE _net2 1N
L2 BASE _net3 1N
C2 COLLECTOR POUT_PreMatching 1P
L3 COLLECTOR _net4 5N
VBIAS BIAS 0 DC 1.6
VP1 PIN 0 dc 0 ac 0.632456 SIN(0 0.632456 30G) portnum 1 z0 50
VP2 POUT 0 dc 0 ac 0.632456 SIN(0 0.632456 30G) portnum 2 z0 50
L4 0 PIN_PreMatcing 1.246N
L5 0 POUT_PreMatching 6.05N
C4 POUT POUT_PreMatching 6.162F
C3 PIN PIN_PreMatcing 37.46F
.control
SP LIN 1000 100MEG 60G
let s11_db=db(v(s_1_1))
let s12_db=db(v(s_1_2))
let s21_db=db(v(s_2_1))
let s22_db=db(v(s_2_2))
write spice4qucs.sp1.plot S_1_1 Y_1_1 Z_1_1 S_1_2 Y_1_2 Z_1_2 S_2_1 Y_2_1 Z_2_1 S_2_2 Y_2_2 Z_2_2 s11_db s12_db s21_db s22_db
destroy all
reset
exit
.endc
.END
o
olisnr
11/26/2024, 8:25 PMthe device is cool, but i would like the m=5 parameter like in the sg13_hv_nmos as example
olisnr
11/26/2024, 8:27 PMmessage has been deleted
olisnr
11/26/2024, 8:28 PMwhit the m parameter i could control the current-factors of the mirrors exactly
r
rupokdas147
11/27/2024, 1:22 AMThe Nx parameter in the npn13G2 is related to the scaling factor, similar to the multipliers in MOSFET. You can ask IHP-Open source PDK's chat gpt app for your specific question.
rupokdas147
11/27/2024, 1:26 AMThough I didn't design any current mirror using npn13G2, when I tested the device I found increasing Nx increases the Emitter current. Similar to the increasing multipliers in the MOSFET, normally used to scale the branch currents of a current mirror.
o
olisnr
11/27/2024, 9:28 AMYes thats true: its like the w parameter of the MOSFETs. the thing is: if You use m then You get exact ratios, and if You use w or nx not.
r
rupokdas147
11/27/2024, 10:39 AMActually m is declared not used anywhere in the sg13g2_hbt_mot.lib file, maybe they will implement in the next release.
o
olisnr
11/27/2024, 10:42 AMYes this would be great
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