Whats the cause of DRC eror Lu.d and Lu.d1 in the padring filler cells? Getting some of those near the corner

Those have large activ area without any contacts so it violates those latchup rules ... it's in the cells themselves, they'd need to be fixed at some point 🤷

Is there a way for me to fix them? Or I shouldnt be worried about it?

For me, @Krzysztof Herman told me not to worry about those.

Ok, thanks!

That was a suggestion from the original designer of IO claimed that, especially that you do not have MOS devices in the close vicinity.