Is there a problem having minimal metal area DRCs ...
# ihp-sg13g2n
Nicolas Abgar Tavares Guimaraes
11/09/2024, 3:39 PMIs there a problem having minimal metal area DRCs caused by metal islands present in the VIAs std cells?
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tnt
11/09/2024, 3:54 PMYeah, in theory a small piece of trace must be attached to meet the min area.
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Nicolas Abgar Tavares Guimaraes
11/09/2024, 4:11 PMCan I make the metal boxes bigger in those vias to solve it?
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tnt
11/09/2024, 4:22 PMSure, but make sure it doesn't then get too close to tracks. Are you using those "manually" ?
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Nicolas Abgar Tavares Guimaraes
11/09/2024, 4:29 PMThe problem is within stacked via that connects layers with one layer in between. So im probably going to make a script to try to solve that
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tnt
11/09/2024, 4:29 PMYeah, but OpenRoad should take care of adding wire stubs to meet minimum area.
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Nicolas Abgar Tavares Guimaraes
11/09/2024, 4:31 PMI’m using OR, but it isnt correcting that… Already tried to increase the minimun area in the LEF, but with no results
Nicolas Abgar Tavares Guimaraes
11/09/2024, 4:32 PMIs there any config that should be applied to make that work?
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tnt
11/09/2024, 4:35 PMYou'd have to ask the OR folks.
tnt
11/09/2024, 4:36 PMI know we had a couple of instances where we end up with a few DRC violations but we bumped up the min area a bit in the LEF and that did the trick when re-running the flow.
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