Hi all Chipathon participants. I improvised the "fictitious" floor plan of the upcoming tape out by the slides submitted to "Chipathon GitHUB". Schematic captures in each area represent the analog block that are referred to Harald Peril's paper. I am intending to modify and try to use it as one of the materials of the article. I would like to add inputs from you all. Waiting for your inputs by the deadline !