open-source-silicon.dev

I am a beginner using XSCHEM. I designed a NAND gate using NFET and PFET and created a symbol from it. However, when I use the symbol in a test bench, it results in an error. Is this a known issue? Thanks.

You shouldn't have power supply inside the symbol itself.

So the symbol should only contain the input and output interfaces, without incorporating VDD and GND?

well you can have pins for VDD and GND but not actual power supply in them.

<@U045R6MSHA6> (Cc <@U016HU5HK8V>) Exactly, you are setting VDD twice. This creates a voltage loop and a singular system of equations. Set the VDD in the top level testbench. The VDD and GND will then propagate through the VDD and GND pins to the nand transistors.

For the same reason if you are using the nand in a testbench remove voltage sources on the inputs in the nand schematic. At the end the nand schematic should only contains transistors, nets (may be with net labels) and I/O pins.

<@U045R6MSHA6> (cc <@U016HU5HK8V>) as a side note, you can leave voltage sources inside your nand gate and arrange these to be present in the spice netlist only if the nand is the top level of the design. Add attribute `only_toplevel=1` to these voltage sources (see image). In this case the elements marked as only_toplevel will not be netlisted when using the nand gate in a testbench.

_If you add these attributes also place a text note to remind you about this attribute. If months later you copy these symbols and place in other schematics you might complain why these are not netlisted._