There was a recent announcement about changes to Skywater's DRC rules. Is there any chance of waiving DRC rules at all for any future submissions? My lab had previously waived some DRC rules (HV nwell spacing, transistor width, nwell varactor overlap) for a chipignite run two years ago, would we need to remake our cells for any future submissions?

@Pranav Mathews I’m pretty sure you will need to fix the DRC errors. @David Lindley, right?

Hi @Pranav Mathews. Anything flagged by the klayout DRC checks today in our Tapeout will NOT be waived by Skywater.

Thank you for the information. I don't have any active designs submitted, I just wanted to know for future reference.