I made a very simple design to fix constant value ...
# clear
f
I made a very simple design to fix constant value on fpga IO : module io_pattern( output [29:0] pattern ); // assign pattern = 30'b000000000000000000000000000000; assign pattern = 30'b111111111111111111111111111111; endmodule With following io constraints : set_io pattern[0] gfpga_pad_io_soc_out[0] set_io pattern[1] gfpga_pad_io_soc_out[1] set_io pattern[2] gfpga_pad_io_soc_out[2] set_io pattern[3] gfpga_pad_io_soc_out[3] set_io pattern[4] gfpga_pad_io_soc_out[4] set_io pattern[5] gfpga_pad_io_soc_out[5] set_io pattern[6] gfpga_pad_io_soc_out[6] set_io pattern[7] gfpga_pad_io_soc_out[7] set_io pattern[8] gfpga_pad_io_soc_out[8] set_io pattern[9] gfpga_pad_io_soc_out[9] set_io pattern[10] gfpga_pad_io_soc_out[10] set_io pattern[11] gfpga_pad_io_soc_out[11] set_io pattern[12] gfpga_pad_io_soc_out[12] set_io pattern[13] gfpga_pad_io_soc_out[13] set_io pattern[14] gfpga_pad_io_soc_out[14] set_io pattern[15] gfpga_pad_io_soc_out[15] set_io pattern[16] gfpga_pad_io_soc_out[16] set_io pattern[17] gfpga_pad_io_soc_out[17] set_io pattern[18] gfpga_pad_io_soc_out[18] set_io pattern[19] gfpga_pad_io_soc_out[19] set_io pattern[20] gfpga_pad_io_soc_out[20] set_io pattern[21] gfpga_pad_io_soc_out[21] set_io pattern[22] gfpga_pad_io_soc_out[22] set_io pattern[23] gfpga_pad_io_soc_out[23] set_io pattern[24] gfpga_pad_io_soc_out[24] set_io pattern[25] gfpga_pad_io_soc_out[25] set_io pattern[26] gfpga_pad_io_soc_out[26] set_io pattern[27] gfpga_pad_io_soc_out[27] set_io pattern[28] gfpga_pad_io_soc_out[28] set_io pattern[29] gfpga_pad_io_soc_out[29] I configured the file openfpga_flow/tasks/SOFA_tasks/config/task.conf accordingly and generated the bitstream with following command : python3 openfpga_flow/scripts/run_fpga_task.py SOFA_tasks If I configure the fpga with ftdi_fpga.py script (which take long time) I can't get fixed values on IOs board pads. Is there anything I forgot to do?
Is it mandatory to configure caravel CPU to use FPGA ?
Ok I understand pinout's table better now. gfpga_pad_io_soc_out (or in) correspond to FPGA IO[] in this table. https://github.com/Martoni/clear?tab=readme-ov-file#io-mapping-and-configuration. I'm still struggling with the clock input though. It's not an FPGA IO[] in the table but it's on pin 36 of the caravel.