Hi, I have developed this notebook that implements...
# ieee-sscs-dc-24
a
Hi, I have developed this notebook that implements and describes (in spanish) the gmid sizing process explained by Boris Murmann. The main objective of the code when I wrote it was to be explicit about inputs and outputs for each sizing step function (estimate cl, get max ugf, etc). I've identified the following guidelines: • Avoid implicit state, every step output can be tracked only from inputs (
system
and
fets
data). • Inputs should not be modified. This improves reproducibility. • Clarity. Each step is well established and can be as complex as it is required. • Decoupling
system
and
fet
information simplifies the exploration of design space. The only drawback I've seen so far is the extra boilerplate (extract variables, concatenate dataframes) and it might cause bugs that are difficult to track. In this point the average engineer desists of making ""better"" code and go back to the naive approach. I think this general guidelines will help us to generate better and more maintainable baseline/sizing code. The notebook I provide follows the rules but I think it is a bit more complex as it could be. If anyone finds a way to reduce the boilerplate code, I'd be grateful to discuss it. https://github.com/ChipUSM/usm-vlsi-tools/blob/24cc2e093463592f60575878528bae1219c55643/shared_xserver/modules/ota-5t/script/baseline.ipynb
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b
Nice!