Hi all, I'm a student trying to design a multiplier using Xschem and Ngspice. As a start, I've completed the inverter tutorial. Using the SKY130 PDK I created a full adder in order to first run SPICE and then Verilog simulation. Currently trying to run a SPICE simulation and obtain the power and timing of the SKY130 standard cell based full adder. The netlist can be generated, however the simulation always has this error. Looking for guidance, any help is appreciated.

@H'Ng Wei Dan Can you try including the standard cell library spice file?

It is somewhere like /usr/local/share/pdk/sky130A/libs.ref/sky130_fd_sc_hd/spice/sky130_fd_sc_hd.spice

Like this?

@H'Ng Wei Dan I think you put it in a code symbol, similar to your SPICE code.

.include /usr/local/share/pdk/sky130A/libs.ref/sky130_fd_sc_hd/spice/sky130_fd_sc_hd.spice

Manged to run it but the results aren't right. The expected results would be Sum = 0 and Cout = 1

@H'Ng Wei Dan I’ve only done a small amount of spice simulation, but I think you need to setup your power and input signals differently. VPB should be equal to VPWR. VGND should be defined somewhere too, I think.

You should also include a voltage source for your power supplies.

Alright thanks @Mitch Bailey @Luis Henrique Rodovalho, will try this out.