Hey all, I have completed the differential PFET pair amplifier design exercise as outlined in the lectures and have obtained the following results. However, I am encountering a relatively large error in the calculated Cgg_ngspice value compared to the LUT value and I am unsure of the root cause. I employed the formula Cfringe = W * 0.239289e-15 and cgg_ngspice = cgg - 2 * Cfringe for my calculations. Could there be an error in this approach?

The Cfringe/W value is different for the PMOS, please refer to the slides.