I m trying to make a `c route` between the `drain` of bottom open-source-silicon.dev #ieee-sscs-dc-24

I'm trying to make a `c-route` between the `drain`...

Sud_ana

07/24/2024, 5:12 PM

I'm trying to make a

c-route

between the

drain

of bottom transistor to

source

of top transistor. Is there any reason the route stops at the guard ring tie cell of bottom transistor rather than extending to the top transistors after it recognizes the port names correctly. The top and bottom are individual components within a top level component and I have tried to change the S/D routing from

metal2

metal 3

. but irrespective of the routing layer the smart route and c routes all terminate within the transistor. The smart route and c route all work within inter-digitized pair and single transistor but how to define it to route from one component to another ? @Sakib Pathen

Sakib Pathen

07/24/2024, 5:14 PM

Can you share your code

Sud_ana

07/24/2024, 7:25 PM

Copy code

def Cascode_CS(pdk: MappedPDK, L1, W1, L2, W2, cs_type):
    Cascode_CS = Component(name="Cascode_cs")
    if (cs_type=="nfet"):
        fet_M1=nmos(pdk, length=L1, width=W1, with_tie=False, sd_route_topmet="met3", gate_route_topmet="met3")
        fet_M2=nmos(pdk, length=L2, width=W2, with_tie=False, sd_route_topmet="met3", gate_route_topmet="met3")
   
    M1_ref = prec_ref_center(fet_M1)
    Cascode_CS.add(M1_ref)
    Cascode_CS.add_ports(M1_ref.get_ports_list(), prefix="M1_")
    M2_ref = prec_ref_center(fet_M2)
    Cascode_CS.add(M2_ref)
    Cascode_CS.add_ports(M2_ref.get_ports_list(), prefix="M2_")
  
    M1_dim = prec_ref_center(M1_ref)
    M2_dim = prec_ref_center(M2_ref)
    movey(M2_ref, 0.5*(evaluate_bbox(M1_ref)[1]+evaluate_bbox(M2_ref)[1]) + pdk.util_max_metal_seperation())
    Cascode_CS << c_route(pdk,Cascode_CS.ports["M2_multiplier_0_source_W"],Cascode_CS.ports["M1_multiplier_0_drain_W"])
    # Cascode_CS << smart_route(pdk, Cascode_CS.ports["M1_multiplier_0_drain_N"],Cascode_CS.ports["M2_multiplier_0_source_S"],M1_ref, M2_ref) 
    shift_amount = -prec_center(Cascode_CS.flatten())[1]
    tap_ring = tapring(pdk, 
                        enclosed_rectangle=evaluate_bbox(Cascode_CS.flatten(), padding=pdk.util_max_metal_seperation()))
    tap_ring_ref = Cascode_CS << tap_ring
    tap_ring_ref.movey(shift_amount)

    return Cascode_CS

Sakib Pathen

07/25/2024, 2:43 PM

Hi Sud Ana, The following code should work

Copy code

from gdsfactory import Component
from glayout.flow.pdk.mappedpdk import MappedPDK
from glayout.flow.placement.two_transistor_interdigitized import two_nfet_interdigitized
from glayout.flow.placement.two_transistor_interdigitized import two_pfet_interdigitized
from glayout.flow.primitives.fet import nmos
from glayout.flow.primitives.guardring import tapring
from glayout.flow.pdk.util.comp_utils import prec_ref_center, movey, evaluate_bbox, prec_center
from glayout.flow.pdk.util.port_utils import remove_ports_with_prefix
from glayout.flow.routing.smart_route import smart_route
from glayout.flow.routing.c_route import c_route

from glayout.flow.pdk.sky130_mapped import sky130_mapped_pdk


def Cascode_CS(pdk: MappedPDK, L1, W1, L2, W2, cs_type):
    Cascode_CS = Component(name="Cascode_cs")
    if (cs_type=="nfet"):
        fet_M1=nmos(pdk, length=L1, width=W1, with_tie=False)
        fet_M2=nmos(pdk, length=L2, width=W2, with_tie=False)
   
    M1_ref = prec_ref_center(fet_M1)
    Cascode_CS.add(M1_ref)
    Cascode_CS.add_ports(M1_ref.get_ports_list(), prefix="M1_")
    M2_ref = prec_ref_center(fet_M2)
    Cascode_CS.add(M2_ref)
    Cascode_CS.add_ports(M2_ref.get_ports_list(), prefix="M2_")
  
    M1_dim = prec_ref_center(M1_ref)
    M2_dim = prec_ref_center(M2_ref)
    movey(M2_ref, 0.5*(evaluate_bbox(M1_ref)[1]+evaluate_bbox(M2_ref)[1]) + pdk.util_max_metal_seperation())
    remove_ports_with_prefix(Cascode_CS, "M2_")
    Cascode_CS.add_ports(M2_ref.get_ports_list(), prefix="M2_")
    Cascode_CS << c_route(pdk,Cascode_CS.ports["M2_multiplier_0_source_W"],Cascode_CS.ports["M1_multiplier_0_drain_W"])
    # Cascode_CS << smart_route(pdk, Cascode_CS.ports["M1_multiplier_0_drain_N"],Cascode_CS.ports["M2_multiplier_0_source_S"],M1_ref, M2_ref) 
    shift_amount = -prec_center(Cascode_CS.flatten())[1]
    tap_ring = tapring(pdk, 
                        enclosed_rectangle=evaluate_bbox(Cascode_CS.flatten(), padding=pdk.util_max_metal_seperation()))
    tap_ring_ref = Cascode_CS << tap_ring
    tap_ring_ref.movey(shift_amount)

    return Cascode_CS

Cascode_CS(sky130_mapped_pdk, 1,1,2,2,"nfet").show()

Sakib Pathen

07/25/2024, 2:43 PM

When you move components the positions of the ports change, but that isnt reflected in the top level component

Sakib Pathen

07/25/2024, 2:44 PM

So you have to remove the ports from the top level component and add them again

Sud_ana

07/25/2024, 9:17 PM

Thanks @Sakib Pathen, it works and I can see the complete routing now.

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