Hello! I would like to run a simulation with Verilator+Cocotb, generate a VCD, then perform power analysis on that VCD. Does anyone know of a good flow for this? • I see report_power from OpenSTA, but that's just static analysis: https://github.com/The-OpenROAD-Project/OpenSTA/blob/1c7f022c/doc/ChangeLog.txt#L106-L126 • Vivado can do power analysis only on SAIF files, not VCD files. I see Synopsys's vcd2saif online, but no free/open-source solutions • Can I synthesize for sky130, then run ngspice to match my VCD somehow? (I feel like that is overkill though) Thanks in advance!

You can load an VCD into sta with read_power_activities

That's awesome! I'll have to check it out I haven't looked much into OpenSTA yet. Can I use it with yosys techlibs to report FPGA power?

I expect so but have never looked at them