<@U03RLCT24HK> Silicon Compiler (<https://siliconc...
# general
t
@Zachary Curtis Silicon Compiler (https://siliconcompiler.com/) from @Andreas Olofsson (who was previously the DARPA PM that launched IDEA & POSH which included creating OpenROAD and FASoC projects that are used by many people on SKY130). It apparently supports both the proprietary and open source tooling and IIRC is being used in the RAMP program <https://www.microsoft.com/azure/partners/news/article/bringing-commercial-innovations-in-chip-design-to-national-security>.
😯 1
z
That is so awesome. I love it
b
@Zachary Curtis @Tim 'mithro' Ansell You may want to take a look at Chipyard https://github.com/ucb-bar/chipyard, and specifically the flow tool, called Hammer: https://github.com/ucb-bar/hammer. It is modular, and supports both commercial (Cadence is open sourced: https://github.com/ucb-bar/hammer-cadence-plugins, Synopsys needs some work to be complete) and open tools: https://github.com/ucb-bar/hammer/tree/master/src/hammer-vlsi. By following Chipyard examples, one should be able to build a custom RISC-V SoC