Is only being able to read from / write to memory addresses above 0x3000_0000 using the Wishbone specific to this code example: https://github.com/efabless/caravel_board/tree/main/firmware/chipignite/demos or does the above 0x3000_0000 constraint apply to all designs that use the Caravel Wishbone?

Howdy @James Meech, the user project area can only respond to Wishbone addresses

0x3000_0000

to

0x3fff_ffff

-- and in older versions of Caravel I think this is even more restricted (upper limit of

0x30ff_ffff

I think). From what I understand there is internal WB logic that decodes the upper bits of the address coming from Caravel and uses that to gate the various WB control signals.