make

Writing 'sky130_fd_sc_lp__mux4_0'
Writing 'sky130_fd_sc_lp__sdfrbp_1'
Writing 'sky130_fd_sc_lp__dfxbp_lp'
Writing '(UNNAMED)'
Must specify name for cell (UNNAMED).
Writing 'sky130_fd_sc_lp__a31oi_1'
Writing 'sky130_fd_sc_lp__buf_2'
Writing 'sky130_fd_sc_lp__a22oi_1'
Writing 'sky130_fd_sc_lp__and4b_4'
Done.
Error message output from magic script:
Can't write file named '(UNNAMED)'
Annotating files in /home/milad/EDA/open_pdks/sky130/sky130B/libs.ref/sky130_fd_sc_lp/maglef
# Create minimum/maximum technology LEF files
./custom/scripts/make_minmax_techlef.py -std_format -variant=sky130A \
	-library=lp 2>&1 | tee -a sky130A_make.log || true
Creating minimum and maximum corner variants of sky130A/libs.ref/sky130_fd_sc_lp/techlef/sky130_fd_sc_lp__nom.tlef
# Remove the base verilog files which have already been included into
# the libraries
rm -f /home/milad/EDA/open_pdks/sky130/sky130A/libs.ref/sky130_fd_sc_lp/verilog/*.*.v
# Create minimum/maximum technology LEF files
./custom/scripts/make_minmax_techlef.py -std_format -variant=sky130B \
	-library=lp 2>&1 | tee -a sky130B_make.log || true
make[3]: Leaving directory '/home/milad/EDA/open_pdks/sky130'
make[2]: Leaving directory '/home/milad/EDA/open_pdks/sky130'
make[1]: *** [Makefile:740: all-A] Error 2
make[1]: *** Waiting for unfinished jobs....
Creating minimum and maximum corner variants of sky130B/libs.ref/sky130_fd_sc_lp/techlef/sky130_fd_sc_lp__nom.tlef
# Remove the base verilog files which have already been included into
# the libraries
rm -f /home/milad/EDA/open_pdks/sky130/sky130B/libs.ref/sky130_fd_sc_lp/verilog/*.*.v
make[3]: Leaving directory '/home/milad/EDA/open_pdks/sky130'
make[2]: Leaving directory '/home/milad/EDA/open_pdks/sky130'
make[1]: *** [Makefile:740: all-B] Error 2
make[1]: Leaving directory '/home/milad/EDA/open_pdks/sky130'
make: *** [Makefile:130: tech-sky130] Error 2

Milad:~$ magic --version
8.3.315