open-source-silicon.dev

<https://github.com/IHP-GmbH/IHP-Open-PDK/issues/52|#52 Layout grid>
Issue created by <https://github.com/bmurmann|bmurmann>
In SG13G2_os_layout_rules.pdf the layout grid is specified as 5 nm, while in sg13g2.lyt it is set to 1 nm. Is this an intentional scale factor or is there some other reason for this difference?
<https://github.com/IHP-GmbH/IHP-Open-PDK|IHP-GmbH/IHP-Open-PDK>

<https://github.com/IHP-GmbH/IHP-Open-PDK/issues/52|#52 Layout grid>
Issue closed as completed by <https://github.com/bmurmann|bmurmann>
<https://github.com/IHP-GmbH/IHP-Open-PDK|IHP-GmbH/IHP-Open-PDK>