Could someone explain licon.12 to me? The documents seem to suggest that it flags if a wide gate lacks licon (5.7um wide or more), but my gates do not have wide gaps between licon contacts. https://skywater-pdk.readthedocs.io/en/main/rules/periphery.html#licon Here is a 5/10V PMOS that is flagged for licon.12.

@Vladimir Vesely is this detected in klayout or magic or both?

This is only detected in klayout. So far I have been treating this issue as a false-flag, but figured it would be best to check See the below magic screenshot. DRC checking is on, and nothing is detected.

Ok. Just to eliminate some basic variables, 1. Is the layout flat or hierarchical? 2. If it is hierarchical, are you running drc in

flat

or

deep

mode? 3. Are these errors detected in precheck or when running klayout drc through the gui? 4. Can you determine the version of the drc rule file you’re using? If not, can you send the shasum’s of the rule files?