Hello everyone , I have few queries regarding Voltage Limits and Optimum Voltage Range for FreePDK 45nm Devices . I am currently working on an off-chip interconnect design using the FreePDK 45nm technology. In my design, I am utilizing the NMOS_VTL and PMOS_VTL devices. 1. Can the NMOS_VTL and PMOS_VTL devices be operated at voltages up to 1.8V without reliability issues? 2. What is the recommended or optimum voltage range for all the device types available in FreePDK 45nm, including: - VTL - VTH - VTG - THKOX Thank you.

It's just a guess, but I think VTL and VTH are core devices and THKOX are IO devices. They have different gate oxide limits. I may be wrong, but FreePDK was based in simulated technologies, not real fab ones, so we couldn't really think about reliability about it. I recommend you to use the available open PDKs. They have relatively extense documentation and are silicon proven.