So I'd like to try and generate a "power good" signal for a power gate. Basically go high when the r...
t
So I'd like to try and generate a "power good" signal for a power gate. Basically go high when the rail has risen enough ( doesn't need to be super precise, like input-vth would be fine ). That signal also needs to be a 1.8v logic while the rail itself is the analog power so could be from 3V to 5V. Is there any "common" simple way to do this ? This is more a "nice to have" so I don't want to put a lot of area into it and it doesn't need to be super precise, but it needs to trigger for sure (i.e. it can't somehow fail and stay 'low'. Going 'high' too soon is fine).
s
The signal goes high when supply is good, is it required to go low again if power supply drops later to a low value?
t
Not really, I'd be fine with it going low only when the control signal (that enable the power gate) go low, but I'm not looking to monitor for brownouts or anything like that.
Thisis my current very messy attempt from someone that barely knows anything 😅 VDPWR is 1.8v rail, VAPWR is 3v3 rail. GAPWR is the gated 3v3 rail. tgon / tgon_n are the output of the level converter that takes the power enable signal in 1.8v domain and converts it into the 3v3 domain ( tgon_n is used to drive the pass PMOS ) And sim result isn't half bad ... but this is just TT, haven't tried other corners or varying rails or anything. And it should also have 0 static power usage which is nice if that circuit is replicated 100s times ...
t
@tnt: See https://skywater-pdk.readthedocs.io/en/main/contents/libraries/sky130_fd_io/docs/user_guide.html#id65. You can make use of this cell; it is in
$PDK_ROOT/sky130A/libs.ref/sky130_fd_io/
. The cell name is
top_pwrdetv2
. There are two complementary power detectors: One detects 1.8V using the 3.3V power domain, and the other detects 3.3V using the 1.8V power domain. The combination of the two outputs indicates that both 1.8V and 3.3V supplies are good.
t
Ok, I'll drop that idea because that block is bigger than the whole area I have available for the entire power gate ...