open-source-silicon.dev

<@U073WEG1PEV> maybe it is just better to make the sealring a little bit bigger

should I have a  gap, fit them tight together or overlap? I think they should fit together

and do not overlap since sealring are continues rings of metals it will produce a short between bondpads

ah true ... looks like min should be ~0.62~ 2.0. Gonna try that

I think this is actually an issue with the sealring cell. The ring border should be located more towards the ring.

My workaround I'm trying right now is increase the offset value in `make_io_sites` by 12.5

<@U069XNVQM4H> only 30 DRCs left and all TV issues are gone!

could you please send me the most up to date GDS, I would like to run it here ?

<@U069XNVQM4H> just send a mail with another layout without metal fill. At least this only generates min metal density violations and no other issues.

I would like to compare the OR metal fill with Cadence to see what's different/wrong