For PIN placement, is it possible to specify the exact coordinates (and dimensions) of each PIN? I have a use case in which a large analog array needs to interface with a digital driver. The analog array is partially manually laid out in Magic, with receiving ports already fixed at the edge of the array. It would be nice for the digital tool to generate its output PINs at exact matching coordinates so the two modules can be butted together without extra routing work. I used to do this for other PDKs in Innovus. However, I cannot seem to find an equivalent capability in OpenLane. Is it possible to do this? The digital driver can be a simple shift register. Each bit connects to one PIN.

You can use

FP_DEF_TEMPLATE

to specify a .def file for pin placement.

I see. A GitHub search shows that user_project_wrapper for caravel uses this mechanism. I'll give it a try. It would be nice to document and have an example of this... Thanks.

You can also insert a custom step into the flow to place the pins. See here how it is done for Tiny Tapeout: https://github.com/TinyTapeout/tt-multiplexer/blob/main/ol2/tt_mux/odb_ioplace.py and https://github.com/TinyTapeout/tt-multiplexer/blob/main/py/tt_odb.py