#103 Series rhigh extraction (LVS alpha) Issue created by lild4d4 I'm doing a resistor common centroid layout and the LVS is only detecting one of the resistors, while for the other is just detecting pairs or as individual's resistors. The next image shows the result of the LVS: image For the moment the design passed LVS when the option '--no_simplify' is used as it was suggested by Dr. Boris Murmann. The next image shows the result of the LVS with the resistor separated in the netlist and the option '--no_simplify': Untitled For more information about this discussion please refer to this slack thread: https://open-source-silicon.slack.com/archives/C0549N94FD3/p1714735895086029 IHP-GmbH/IHP-Open-PDK