🚀 STA is done at multiple stages in the design flow. The primary reason for this is to catch issues earlier in the flow. The rule of thumb 👍 is if you cannot meet timing early on in the flow, timing will likely become worse later on in the design flow. 👉Post synthesis STA - When you do STA (timing analysis) post-synthesis. This step may be before or after scan synthesis or both. STA at this stage is logical level without much physical information. So ideal interconnects based upon wireload models are used. The advancements in synthesis technology with topographical information provide early visibility into physical effects. The latest tools use a slightly better approximation of interconnect delays. The clocks at this stage are ideal, with estimates for latencies and jitter provided manually (usually based on previous forecasts on similar chips). 🧠 STA in the physical design stage - During the physical design STA, also STA is done at multiple steps. As you progress in the physical design stage, the interconnect delays and clock latencies start becoming more and more accurate. Initially, interconnect delays are based upon global routing estimates. Then, as routing information becomes more precise, the delays with actual routes with appropriate extraction. Later on, during the signoff stage, the delays are accurate with detailed modelling and parasitics are taken into account. ⌚During the clock tree synthesis (CTS) stage, clocks are propagated, and STA tools calculate the actual clock network effects. Clock latencies and delays are not estimated, but actual delay values are based upon clock paths. CRPR is also used now as absolute clock paths are considered. Later on, during signoff, crosstalk effects are also considered. 🏃‍♀️The last three days remain to book your seat for the STA and TCL bootcamp. Use the links below to contact and order STA Bootcamp details - https://vlsideepdive.com/3-week-in-depth-sta-and-constraints-bootcamp/ TCL Bootcamp details - https://vlsideepdive.com/weekends-only-tcl-bootcamp/ Contact here for the last discounted seat - https://api.whatsapp.com/send/?phone=919817182494&text=Hi+vlsideepdive%2C+I+have+a+query&type=phone_number&app_absent=0