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When a symbol has a vector like `[0:31]` how can I split it ?
# xschem
t
When a symbol has a vector like 
[0:31]
how can I split it ?
l
Split? You could make an instance [0:15] and another [16:31].
t
I mean I have a symbol created by spice_to_sym script :

https://i.imgur.com/I5xNAo4.png▾

And it grouped my arrays of signals into "busses".
But now, how do I wire independent signals ?
l
You can separate the signal with commas. Something like x[015],y[1631]
t
Yeah, doesn't seem to really work.

https://i.imgur.com/bHtcsf5.png▾

But in the generated spice, nothing is connected to any of the wla pins.
l
You must connect a label wla[0:31] to the outupt
Or 32*wla[0]
t
Still nothing in the generated spice
Copy code
** sch_path: /home/tnt/projects/asic/dram/xschem/test-grid.sch
**.subckt test-grid
x1 GND ram_grid2_parax
V1 wla[0] GND 1.8
**.ends

* expanding   symbol:  /home/tnt/projects/asic/dram/xschem/ram_grid2_parax.sym # of pins=3
** sym_path: /home/tnt/projects/asic/dram/xschem/ram_grid2_parax.sym
.include ram_grid2.sim.spice
.GLOBAL GND
.end
.sym
has 
format="@name @VGND @@bl[0] @@bl[1] @@bl[2] @@bl[3] @@bl[4] @@bl[5] @@bl[6] @@bl[7] @@bl[8] @@bl[9] @@bl[10] @@bl[11] @@bl[12] @@bl[13] @@bl[14] @@bl[15] @@bl[16] @@bl[17] @@bl[18] @@bl[19] @@bl[20] @@bl[21] @@bl[22] @@bl[23] @@bl[24] @@bl[25] @@bl[26] @@bl[27] @@bl[28] @@bl[29] @@bl[30] @@bl[31] @@wla[0] @@wla[1] @@wla[2] @@wla[3] @@wla[4] @@wla[5] @@wla[6] @@wla[7] @@wla[8] @@wla[9] @@wla[10] @@wla[11] @@wla[12] @@wla[13] @@wla[14] @@wla[15] @@wla[16] @@wla[17] @@wla[18] @@wla[19] @@wla[20] @@wla[21] @@wla[22] @@wla[23] @@wla[24] @@wla[25] @@wla[26] @@wla[27] @@wla[28] @@wla[29] @@wla[30] @@wla[31] @@wlb[0] @@wlb[1] @@wlb[2] @@wlb[3] @@wlb[4] @@wlb[5] @@wlb[6] @@wlb[7] @@wlb[8] @@wlb[9] @@wlb[10] @@wlb[11] @@wlb[12] @@wlb[13] @@wlb[14] @@wlb[15] @@wlb[16] @@wlb[17] @@wlb[18] @@wlb[19] @@wlb[20] @@wlb[21] @@wlb[22] @@wlb[23] @@wlb[24] @@wlb[25] @@wlb[26] @@wlb[27] @@wlb[28] @@wlb[29] @@wlb[30] @@wlb[31] ram_grid2_parax"
l
Your sym must have the wrong format. Have you tried the automatic pin format?
@name @pinlist @symname
t
I mean this 
.sym
was created automatically by the script 
make_sym_from_spice.awk
which ships with xschem ...
l
We must call the pros. Hello, @Stefan Schippers!
s
@tnt in the symbol format attribute replace the @@bl[..] ... list with bl[0:31] and similarly for wla and wlb: 
format="@name @VGND @@lb[0:31] @@wla[0:31] @@wlb[0:31] ram_grid2_parax"
The bottom line is that the make_sym_from_spice.awk does not work well with netlist containing indexed ports (bl[...] and such). My suggestion is to use the simple 
format="@name @pinlist @symname"
To correctly connect wires to this symbol, after instantiating it in a parent schematic click the symbol and press Shift-H
bussed_ports.mp4
t
@Stefan Schippers 
@pinlist
was complaining about pin order not matching, I think it might have been because of 
@VGND
being an attribute instead of pin or something.
But using the 
@@bl[0:31]
works perfectly thanks !
m
what's this for Sylvain?
t
Nothing any more given the updated MiM cap DRC rules 😅
m
dang
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