tnt
04/15/2024, 8:07 PM[0:31]
how can I split it ?Luis Henrique Rodovalho
04/15/2024, 8:13 PMtnt
04/15/2024, 8:17 PMhttps://i.imgur.com/I5xNAo4.png▾
tnt
04/15/2024, 8:17 PMtnt
04/15/2024, 8:17 PMLuis Henrique Rodovalho
04/15/2024, 8:18 PMLuis Henrique Rodovalho
04/15/2024, 8:20 PMtnt
04/15/2024, 8:28 PMtnt
04/15/2024, 8:29 PMhttps://i.imgur.com/bHtcsf5.png▾
tnt
04/15/2024, 8:29 PMLuis Henrique Rodovalho
04/15/2024, 8:30 PMLuis Henrique Rodovalho
04/15/2024, 8:30 PMtnt
04/15/2024, 8:34 PM** sch_path: /home/tnt/projects/asic/dram/xschem/test-grid.sch
**.subckt test-grid
x1 GND ram_grid2_parax
V1 wla[0] GND 1.8
**.ends
* expanding symbol: /home/tnt/projects/asic/dram/xschem/ram_grid2_parax.sym # of pins=3
** sym_path: /home/tnt/projects/asic/dram/xschem/ram_grid2_parax.sym
.include ram_grid2.sim.spice
.GLOBAL GND
.end
tnt
04/15/2024, 8:35 PM.sym
has format="@name @VGND @@bl[0] @@bl[1] @@bl[2] @@bl[3] @@bl[4] @@bl[5] @@bl[6] @@bl[7] @@bl[8] @@bl[9] @@bl[10] @@bl[11] @@bl[12] @@bl[13] @@bl[14] @@bl[15] @@bl[16] @@bl[17] @@bl[18] @@bl[19] @@bl[20] @@bl[21] @@bl[22] @@bl[23] @@bl[24] @@bl[25] @@bl[26] @@bl[27] @@bl[28] @@bl[29] @@bl[30] @@bl[31] @@wla[0] @@wla[1] @@wla[2] @@wla[3] @@wla[4] @@wla[5] @@wla[6] @@wla[7] @@wla[8] @@wla[9] @@wla[10] @@wla[11] @@wla[12] @@wla[13] @@wla[14] @@wla[15] @@wla[16] @@wla[17] @@wla[18] @@wla[19] @@wla[20] @@wla[21] @@wla[22] @@wla[23] @@wla[24] @@wla[25] @@wla[26] @@wla[27] @@wla[28] @@wla[29] @@wla[30] @@wla[31] @@wlb[0] @@wlb[1] @@wlb[2] @@wlb[3] @@wlb[4] @@wlb[5] @@wlb[6] @@wlb[7] @@wlb[8] @@wlb[9] @@wlb[10] @@wlb[11] @@wlb[12] @@wlb[13] @@wlb[14] @@wlb[15] @@wlb[16] @@wlb[17] @@wlb[18] @@wlb[19] @@wlb[20] @@wlb[21] @@wlb[22] @@wlb[23] @@wlb[24] @@wlb[25] @@wlb[26] @@wlb[27] @@wlb[28] @@wlb[29] @@wlb[30] @@wlb[31] ram_grid2_parax"
Luis Henrique Rodovalho
04/15/2024, 8:40 PMLuis Henrique Rodovalho
04/15/2024, 8:41 PMtnt
04/15/2024, 8:42 PM.sym
was created automatically by the script make_sym_from_spice.awk
tnt
04/15/2024, 8:42 PMLuis Henrique Rodovalho
04/15/2024, 8:43 PMStefan Schippers
04/15/2024, 9:33 PMformat="@name @VGND @@lb[0:31] @@wla[0:31] @@wlb[0:31] ram_grid2_parax"
The bottom line is that the make_sym_from_spice.awk does not work well with netlist containing indexed ports (bl[...] and such).
My suggestion is to use the simple format="@name @pinlist @symname"
To correctly connect wires to this symbol, after instantiating it in a parent schematic click the symbol and press Shift-Htnt
04/16/2024, 6:21 AM@pinlist
was complaining about pin order not matching, I think it might have been because of @VGND
being an attribute instead of pin or something.tnt
04/16/2024, 6:24 AM@@bl[0:31]
works perfectly thanks !Matt Venn
04/17/2024, 10:58 AMtnt
04/17/2024, 11:03 AMMatt Venn
04/17/2024, 3:21 PM