<@U02GF0WJKS7>: Yes, the OE in the user design d...
# mpw-3-silicon
t
@gatecat: Yes, the OE in the user design does matter for
C_USER_OUT
configured I/O. There is no way to get output from a user project without having the corresponding user output enable tied or held low. Your first two bullet points are correct. However, a chip which passes
make check
it not necessarily guaranteed to survive hold failures, because some portion of chips have hold violations so close to the edge of failure that they will fail or not fail at random. In practice, I've had to discard such chips as untestable. I recall the rate of untestable chips being as high as 20% or so.
g
Thanks! I'm starting to fear something has gone wrong and our OEB just isn't being driven low correctly.