Trying to figure out some mysteries playing with my MPW4 chip a bit - I've forgotten almost everything since I did MPW2, I must admit (if we want a new MPW4 channel, let me know, but I guess 3&4 are close enough...) Just a couple of questions to try and get me back up to speed: • `C_USER_BIDIR_WPU`/`C_USER_BIDIR_WPD` - these use weak drive for outputting 1/0, right? and the bit pattern is designed to be more dependent-hold-failure-friendly than C_USER_BIDIR? •

make check

in

gpio_test

etc which runs

gpio_config_checker.py

- if this passes, then the selected configuration should survive the hold failures for a chip, right? • does OE in the user design still matter for

C_USER_OUT

configured IO?