@Tim Edwards I’m trying to extract

caravel

while abstracting

user_project_wrapper

(by setting

LEFview

to true). This creates a black boxed

user_project_wrapper

in the extracted layout as expected, but

user_proj_example

is also included with all its subcircuits. Is there a command to ignore the subcircuits of abstracted cells? The

user_project_wrapper.ext

file has

use V2_user_proj_example mprj 1 0 12000 0 1 3000
abstract

Maybe the netlister is transversing the hierarchy even if the cell has the

abstract

attribute. Is this the intended operation?

sounds like this will be useful for me as I attempt LVS on a mixed signal design soon. I don't want the openlane generated part to be used in the LVS

@Matt Venn why not?

because it will take a lot longer? And it's already been done by OpenLane? I just assume it will add complexity

I don’t think it will take “a lot” longer unless you have sram macros, but we can try some different setups.

ok, well I'm certainly up for a complete LVS, that would feel safer

@Matt Venn: The LVS algorithm runs O(log(N)) so you can add huge amounts of digital and it won't slow it down much. There are some cases where an LVS failure causes an O(N) flattening cycle, but since the digital blocks should have already passed LVS in Openlane, then that shouldn't happen in your case.