Asicle (Wordle clone) bring-up saga, part 4
# mpw-6plus-silicon
h
Asicle (Wordle clone) bring-up saga, part 4
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In the last episode I could finally play the game on a proper screen without glitches. I also improved my real-time vga debugging setup, up to an ~870kHz pixel clock. Since then I worked on two projects in parallel. One was pushing this pixel clock even further, up to the full 25MHz, with some caveats - I'll talk about that next time. The other was a bit of a side quest, and that's our topic for today.
Ever since I received my first chips, I was slightly concerned that my open-source designs require a couple of other ICs on the bring-up board that are not themselves open-source. This is understandable given the nascent state of open-source silicon, but I took it as a challenge to do a fully open-source bring-up. Finding readily available replacement ICs seemed unrealistic and taping out new designs would have taken a long time. So the reasonable approach was to build the supporting circuitry from discrete transistors and passives.
The official development board contains • ftdi uart interface + two buffers • power on reset • 3.3V linear regulator • 1.8V linear regulator • qspi flash • mems oscillator
My design also uses a PmodVGA that has two buffers of its own.
I've specifically designed my user_project_wrapper in such a way that it doesn't depend on the management core. This should allow me to get rid of the qspi flash. I can probably also safely remove the ftdi chip with is buffers as well as the VGA buffers.
How do I remove them? I didn't want to unsolder from the official board, so instead I designed and ordered some m.2 breakouts: https://github.com/htfab/m2e-breakout
ab4-b1.jpg
I moved the m.2 card and the IO wires from the official board to the breakout. I still kept the official board powered on for the supporting ICs that I planned to disconnect/replace one by one. I connected the power, clock, reset, flash and gpio pins across the two boards so as to get a refactored version of the original setup. It was working properly, so I could now start removing the wires.
ab4-c1.jpg
I've already implicitly removed the ftdi chip by not bridging the IO pins between the two boards. Removing the flash didn't work at first as I was relying on the PLL to generate the 25MHz clock and the PLL configuration was stored in firmware. Once I added a Pico to use as an external clock I could get rid of the flash.
Removing the power-on-reset chip and keeping ~RST floating made my design come up in some weird states like the teaser photo at the beginning of this thread. So I connected ~RST to 3.3V instead, which made it work 99% of the time, good enough for the time being. Later on I replaced it with a 47k pull-up with a manual reset button shorting it to ground, and even the occasional errors disappeared.
The VGA buffers were also easy to remove, but since I didn't want to modify my PmodVGA, I've replaced it with a resistor DAC on a perfboard. I went with an R2R design with 2R not exactly the double of R (at 4 bits per color it's a reasonable compromise).
ab4-d1.jpg,ab4-d2.jpg,ab4-d3.jpg,ab4-d4.png,ab4-d5.png
I also had to replace the Pico+controller inputs and go back to micro switches. This time I also added 47k pull-downs as the built-in pull-downs in Caravel were too weak and occasionally produced some spurious button presses (maybe due to EMI in the fly wires).
ab4-e1.jpg,ab4-e2.png
At this point I was left with the linear regulators and the mems oscillator.
I wanted to replace the linear regulators with BJTs using zener diode voltage references at their bases. Unfortunately I forgot about the base-collector voltage drop when ordering the 1.8V and 3.3V zeners (instead of 2.4V and 3.9V). My plan B was to build on the fact that we have regulated 5V input and use a trim pot voltage divider as the voltage reference.
ab4-f1.jpg,ab4-f2.png
The mems oscillator was the most tricky one. I decided to replace it with a Pierce oscillator circuit using a parallel resonant fundamental mode 25MHz crystal. The Pierce oscillator is a somewhat delicate circuit and my first few attempts didn't show any sign of life. After a few tries I gave up on guessing the component values and went on to understand the theory behind them. This video helped me a lot:

https://www.youtube.com/watch?v=5StwZCeNzVU

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My next attempt did in fact oscillate, albeit at the wrong frequency. Interestingly, the oscillation didn't stop when I removed the crystal from the circuit. Turns out it's not a good idea to prototype a 25MHz oscillator on a solderless breadboard as the parasitics make an RC circuit with stronger feedback than the crystal. I recreated the same circuit using a perfboard and in "ugly style", and both generated the expected 25MHz sine wave.
ab4-g1.jpg,ab4-g2.jpg,ab4-g3.jpg,ab4-g4.png
I couldn't yet attach the Pierce oscillator to the CLK pin as the amplitude of the sine wave was too low. Instead of amplifying it, I cheated a bit by driving the oscillator directly from 5V instead of 3.3V. This was enough to get the chip working and I got a reasonable output with a bit of hsync shearing:
ab4-h1.jpg
Further testing revealed that the shearing effect was caused by the Pico. While no longer directly connected to the chip, it was still plugged into the same battery pack as my circuit and affected it via power supply noise. Removing the Pico fixed the image, but I added some decoupling caps to make it also behave properly next to noisy neighbors - they are already reflected in the photos and schematics above.
Here are some photos of the complete open-source bring-up circuit, along with its schematics and a "screenshot":
ab4-i1.jpg,ab4-i2.jpg,ab4-i3.jpg,ab4-i4.jpg,ab4-i5.png,ab4-i6.jpg
m
amazing effort!
very cool
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a
Wow! So much information and eye candy! Love your work and that you've shared all this. I will have to make a coffee, sit down, and read 🙂
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