For klayout LVS, how do you handle verilog source netlists? Or a combination of verilog and spice netlists?
a
Austin Rovinski
01/23/2024, 8:58 AM
If the verilog netlist is flat, one option is to read in the verilog and the master CDL into OpenROAD and then write out the CDL which should be usable by KLayout.
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