Well I at least communicated with management core,...
# mpw-6plus-silicon
b
Well I at least communicated with management core, will work on for accessing user area
t
Please let me know, too, if you're able to communicate with the user project area.
@Burak Aykenar: There was a mix-up at the packaging house. Your project ID reads 0x00070f74, which makes it chip location A1, tinytapeout (one of @Matt Venn’s projects), regardless of what got printed on top of the package.
b
@Tim Edwards Do you mean I got the wrong chips? I checked bare dies and they seem to be our design from the images that I took. Also if you mean project ID read from the board, it is not 0x00070f74 but 0x0001c3dd in the image?
m
Hi Burak! Glad you got my chips!
I can trade for some bitcoin asic miners?
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b
whaaaaaaaat! Well I checked bare dies and they seem to be my design, I can detect OpenRAM macros and other macros in the image. However, I will check packaged M2 chips and try to understand what are their project IDs. Then the question is: Where the ... my packaged M2 connection chips 😐
m
yes, we got the right bare dies, but the QFNS were mixed up and wrongly marked
b
ok, let me check all the QFNs and discover what are their project ids
how to find what is my MPW7 project id and who has the chips? @Tim Edwards you have an idea?
m
Efabless will email us all with instructions
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I'm not sure yet how the exchange will be done