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i am unable to understand how to fix this error.? ...
# openlane-2
v
i am unable to understand how to fix this error.? is this error is due to area ? any config variables to set regarding this?
k
does this design include a macro ?
v
yes
has .mem files
k
Can you try viewing the layout and checking if the macros are properly placed ?
v
its a very big design i mean,a microcontroller design.has spi,cache etc
ok i will reply you back after seeing it. how can i see openroad -gui ???
k
depending on how you are running openlane2 you can append these options/flags to your command line arguments
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--last-run --flow openinopenroad
or
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--last-run --flow openinklayout
v
sure thanks
[nix-shell:~/Storage/vinayaka/openlane2]$ python3 -m openlane --dockerized ./openlane/mk_soc_fpga/config.json --from yosys.jsonheader this was my command to run desgn in openlane 2. im not aware of how i add your flags. can you please help..
k
can you try?
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python3 -m openlane --dockerized ./openlane/mk_soc_fpga/config.json --last-run --flow openinopenroad
v
thanks it worked..i scacred how if it starts running other run
let me examine ,i never looked into this, felt hard to find which macro is not placed good!! any inputs
?
and very thanks for this instant replies and help
👍 1
k
Can you share a screenshot of the layout and the generated def file. It would be best actually if you can share a reproducible
v
sure sir
def.file is 1.2gb to open
itw way too huge to send the folder.so i made zip file for def file kindly help
errors.logmk_soc_fpga.def.tar.gz
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