@Mitch Bailey How the analog_io* are mapped to io_in*, io_out* and io_oeb* there are 29 analog_io 0:28 and the others io_*0:37 Can i use the remaining io29:37 for other design usage? like giving 1.8 V voltage references to fet gates?

From

verilog/rtl/user_project_wrapper.v

// Analog (direct connection to GPIO pad---use with caution)
    // Note that analog I/O is not available on the 7 lowest-numbered
    // GPIO pads, and so the analog_io indexing is offset from the
    // GPIO indexing by 7 (also upper 2 GPIOs do not have analog_io).
    inout [`MPRJ_IO_PADS-10:0] analog_io,

So

analog_io[0]

goes to the same gpio as

io_out[7]

.

analog_io[28]

goes to the same gpio as

io_out[35]

. There are no analog connections available for gpio 0-6,36,37.